The 3-series’ E-core design choices avoid much of the controversy surrounding the P-cores. Here, the eight Darkmont cores outmuscle their Skymont predecessors with typical double-digit (roughly 17%) improvements. This should come as no surprise, as the weakest link in E-core design was not their math-crunching ability, but rather their cache acting as a bottleneck. Thanks to smarter algorithms and faster interconnectivity to said cache, these bottlenecks still exist, but they are getting smaller with every generation.
Of course, with a 15% to 20% improvement in performance-per-watt, that sweet node shrink, and the new backside power delivery configuration, these E-cores don’t really throttle as often as they did in previous generations. Instead, their consistency is edging further into the “rock solid” end of the spectrum and away from the “random spasmodic episodes” that previous generations were known to relish from time to time.
Which brings us to the other star of the Panther Lake show. The Low Power island E-Cores (“LP e-cores”). On paper, having the LP e-cores closer to the IMC on the SoC Tile made sense. In reality, this location potentially meant two hotspots on the chip, two radically different node sizes used for the cores (or baking the SoC in the same pricey oven as the Compute Tile instead of on the more inexpensive N6 node), and increased complexity for the Thread Director. Put simply, the two LP e-cores in the second gen took up room and only helped in edge/niche cases… and this became glaringly obvious in Lunar Lake, where the P and E cores did not reside on the same chunks of sand.
With Panther Lake, Intel has learned its lesson, and that design choice has been relegated to the dustbin of history (where it hopefully will stay). First, the LP e-cores are moved to the Compute Tile where they belong. Next, since the P-core count was lowered, Intel was able to include four instead of just two of them (aka a 4+8+4 vs 6+8+2 core count configuration on the 9-class options). Since they are on the Compute Tile, they also get the full Darkmont IPC upgrade. The only hitch is they are not on the same ring bus and don’t’ share the L3 cache with their 8 E-core brethren. Instead, they mainly rely on the memory side bus / “L4” cache buffer. However, as they are on the same Tile, truly low power threads can nearly be seamlessly pushed off the E-cores and onto an LP e-core (and vice versa) with a much lower chance of a noticeably st-st-stssssstuter occurring.
Mix in a noticeable decrease in idle power consumption (now less than half a watt per core) with increase in performance; then add in the fact they still have their own dedicated power rail allowing for the rest of the Compute Tile to enter a lower power state and… the end result is a massive uptick in real world happiness with three different core types in play on one chip.
Moving on to the SoC Tile: there isn’t one. Since it has been gutted compared to the previous generations, Intel has done a bit of rebranding. The new “Platform Controller Tile” handles (as the name suggests) the I/O, security, and connectivity duties (e.g. Wi-Fi 7, Thunderbolt 4, and up to 20 PCIe lanes). All of these are things that do not need cutting-edge performance to get the job done; this smaller tile is still baked in the old TSMC N6 oven. However, since so much has been moved to the Compute Tile, that second hotspot on the IHS has also been removed. Taken as a whole, the gutting and rebranding of the SoC is a Good Thing™.
Moving on to the biggest claim to fame the 3-series offers: the iGPU. It is no secret that the last-generation Core Ultra 2-series made great strides in the iGPU department. Bluntly stated, the Arc 140V was night and day better compared to previous iGPUs, but AMD had such a lead that Xe 2-based iGPUs were still competing in the “also ran” category. This generation, Intel is making a serious effort to woo the gaming and entertainment-consuming buyer via a legit Arc Battlemage. Specifically, it is the B390 housed inside the 388H’s Graphics Tile.
This iGPU may be branded as a Battlemage (Xe2), but in reality, it is rocking Xe3 “Celestial” technology and not just the Xe2 tech seen in the Lunar Lake 140V. To be fair, in this B390 iteration, Xe3 is more of a “tock” to the Xe2’s “tick.” It consists mostly of refinements and tweaking done to the Xe2 architecture rather than a full-blown generational leap that we may or may not see in future Celestial-branded Arc GPUs. This is likely why it carries the B390 and not a C390 name.
Regardless of what you call it, this an iGPU that means serious business. So serious it offers about 70 to 80’ish percent performance uplift over its predecessor. Which should come as no shock, as it is rocking 50% percent more Xe cores, 50 percent more ray-tracing cores, twice the L2 cache… countless refinements in said cores and their algorithms… and a ten percent max boost in the frequency it runs at (2.2GHz vs 2.0GHz). Heck, thanks to the improvements baked into BSPD vs FSPD this “max boost” frequency is more like a suggestion and not a hard and fast limit. Thus, Intel giving it only a double and not triple digit uplift rating is probably being overly conservative.
Overall, by methodically enhancing core distribution, integrated graphics capabilities, and power management precision is blatantly obvious that Intel will be able to not only regain lost ground but even start to seriously compete outside of their historical “good for work, bad for games” niche they have been surviving inside of for the past couple years. Color us impressed.
