Before we begin, we do have to make it clear. This is a P-class model. It just happens to be newer/faster/better than the older T500. As such, while we do think a T510 is being planned… Crucial may indeed be playing with the idea of “streamlining” their T lineup. Thus, making the P510 not the short-term spiritual successor to the T500 but the actual successor. Only time will tell which way Crucial decides to go but it is pretty obvious the design team(s) were hedging their bets when they specc’ed and built the P510 series. In this vein, it should come as no surprise that the “P510” series does not use the (white+blue / “OG Crucial”) P-class shipping container. It makes use of the Crucial Pro T500s. Right down to the internal protection configuration.
This means the highly attractive blue with white highlights that, up until now, was reserved for more premium editions.
This means the same excellent two-piece internal clamshell configuration that snuggly holds the drive and can take a veritable ton of shock, and a surprisingly high amount of cutting force, before any type of damage is transferred to the P510 itself. Put another way, this is a shipping container that exudes quality. Exuded quality inside and out… and belies its more modest “P-class” branding. Which is a good thing, as this is a P-class drive with a T-class asking price. Which also further reinforces the question of whether or not this was originally going to be released as a T510 and not a ‘P510’.
With that said, this is not a perfect shipping container. Instead, it comes with the typical issue that Crucial’s mainstream and higher class of modern shipping containers all seemingly suffer from: capacity confusion. It is a wee bit too easy to pick up the wrong capacity model and be “surprised” at the checkout. Conversely, it is way, way too easy for an overworked, yet underappreciated, warehouse factory worker to pick up the wrong option to ‘fulfill’ your online order. Both are Bad Things™. Both could easily be alleviated by making the capacity label as large as the model name. Since Crucial is stubbornly using a font so small that elderly people will not even see it, we do have to keep beating what should have long since been a dead, and replaced, horse… and we will continue to do so until this self-inflicted issue is fixed.
Moving on.
As with both the P310 2280 edition(s) and the T500, the 2TB capacity variant of the new P510 is a single-sided drive. The benefits to this are many. For example, even the most basic of heat spreaders on even the most basic of motherboards should (technically) be able to properly cool this drive (with the usual caveats such as enough air flow and thermal mass in said heat spreader). The same is true of aftermarket heatsinks. As long as they are proven to be able to keep last generation, PCIe 4.0-based, “enthusiast” drives, from thermally limiting said heat sink will work with P510. Put another way, by keeping to the same single-sided form-factor that helped to make the T500 such a hit, Crucial can offer a PCIe 5.0-based drive that is destined to become a fan favorite solely due to its ease of use and novice friendliness.
Equally impressive is that the relatively low heat output of the T500 has also been carried over. Relatively speaking, that is… as this is a drive that will still be pumping out about 8’ish watts of waste heat. That is a steep increase compared to the rounding errors worth for the P310 and even the T500’s 5-ish watts. However, it is only ~3 extra watts of waste heat, and that is nothing compared to the double-digit output of the hotrod T705 series. Put bluntly sub-10 watts (by a wide margin) by PCIe 5.0 NVME SSD standards is insanely cool running. So cool running one does not really need those big boi ThermalRight TR-9/10 models. Instead, the lower profile Acidales of the market are once again viable options. Color us impressed.
So, how was Crucial able to offer a PCIe 5.0-based SSD that runs as cool as the typical last-generation “enthusiast edition” PCIe 4.0 drive? Simple. Modernization / Miniaturization and best-in-class NAND. All of which are critical to this drive’s overall good-to-great performance.
The first is the controller. This is where the P510’s design team was able to cut major amounts of waste heat output. As with the T500 (and P310 for that matter) before it, the P510 makes use of a lower-performance controller. Albeit this time instead of it being the latest version of a “lower performance” PCIe 4 Phison controller, it is now the recently released E31T… a smaller, cooler running PCIe 5.0 class controller. Make no mistake. As the last generation T500 and its E25 proved, lower performance is not the same as saying low performance.
So while it is true the P510’s newer E31’s design has is ‘only’ a tri-core (R5 based) controller instead of the quad-core that the E25 was rocking… that really does not matter all that much for the mainstream consumer. Firstly, instead of those ARM Cortex R5’s running at either 800Mhz or 1’ish Gigahertz, these three new cores run at up to 1.2GHz. Furthermore, instead of doing a darn near locked in 2+2 configuration where only two cores were for real-time IO requests and the other two were being used as CoX co-processors, the new E31 can actually use all three for real-time or even two for CoX background ‘house cleaning tasks’ and just one for real-time I/O tasks (e.g. during idle periods).
This adjustment, combined with major low-level ECC improvements means that the E31T is much faster at completing tasks than the E25 was. Which in turn means less time running in high-performance 1.2GHz mode and more time in lowered C states. With that said, a good chunk of the power consumption (and thus waste heat output) savings come from swapping from an ancient TSMC 12nm node process to a newer 7nm. A process which simply needs less power to hit a given frequency.
Being cool running is all well and fine in theory, but if in practice, performance is not up to modern standards… it is not worth the tradeoff. This is where the NAND part of the equation enters the chat. The last-gen T500 made use of excellent NAND for its day. Hell, B58R TLC RG NAND and its 2400MT/s is, by very definition, still high-performance TLC NAND. It just is… “slow(er)” compared to the new ‘G9’ (aka ‘B68’ FortisFlash). Forget NAND density, 232 vs. 276 layers, or even 2400MT/s vs. 3600MT/s debates. What matters the most about what has changed is the low-level performance increase… and the insane engineering that went into them.
Yes. 3600MT/s based NAND is why this itty bitty DRAM-less controller is able to peak at well over 10,000MB/s. That really does not matter all that much outside of large file sequential r/w scenarios. Instead, what ‘G9’ brings to the table is major improvements in Die write speed – 300MB/s vs 160MB/s. Major improvements in block erasure speed – 320us vs 600us. Major improvement in read speed – 32 vs 61us. The first two matter more than breaking the 10K MB/s sequential barrier because when the pSLC write cache buffer becomes exhausted (which will be hard for the average home user to do all that often) this NAND will be almost twice as fast as the T500 and dig itself out of the hole much faster than B58R NAND could. Arguably, the boost to low-level read performance matters even more to average buyers, as typical home users do a lot more read requests than they do writes. Thus, this one-two combination is a veritable body blow to performance-robbing bottlenecks… and arguably represents the largest single generation improvements since the inception of Micron’s CuA RG TLC NAND design.
Which is all a good thing… as there are major downsides to opting for only populating the P510’s PCB’s top side. Namely, lack of space for “pesky” little things like a RAM IC or more than 2 NAND ICs. Yes. This is indeed why Crucial opted for the 4-channel controller-based E31 and did not wait for the T705’s E26 (or just even T500’s E25) replacement to land. So yes. The P510 is indeed the spiritual successor to the T500, as it is in no shape nor form competition for the T7xx series. Instead, this DRAM-Less M.2 is competition for the usual suspects and their mainstream PCIe 5.0 models… while also, by “total happenstance,” also deletes the T500 from consideration for most builds.
On the positive side, one of the major issues we have/had with the T500 has been partially alleviated via application of the brute force / ‘bigger hammer’ method of problem solving. Namely, the use of much more potent NAND reduces the I/O bottlenecking that occurs with all 4 or 8 channel controllers that are not connected to the same number of NAND ICs. Yes, the PHISON E31 is a four-channel design, not eight. Yes, with 2TB worth of dies, each of those 3600MT/s channels are fully populated with 4 full dies worth of NAND on each channel. Yes. Thanks to the new NAND speed, a “2 on 4” configuration is arguably ‘good enough’. It just is not optimal. It is not optimal as there are not four separate and distinct low-level controllers handling the load. There is only a pair of CuA arrays’ worth of electronics to filter all the I/O requests at the cell level. Not four like if there were 4 NAND ICs (aka ‘4 on 4’ configuration).
This issue is further exacerbated by the fact that Phison drives use SmartFlush algorithms. Algorithms which, alongside ensuring the (off PCB in the P510’s case) RAM cache is cleared safely and routinely to the NAND also enact emergency block cleaning before the pSLC write buffer is full. In theory, that keeps the controller from ever having to write directly to the TLC NAND in ‘TLC mode’ and thus keeps performance at levels buyers have come to expect from modern NVMe drives. Sadly, while SmartFlush is working its magic in the background, those real-time I/O requests are still coming in hot and heavy. Which in turn means the E31 is trying to funnel those SmartFlush block erasure requests over/through those selfsame 2 NAND IC’s CuA circuits that are being (over) saturated by real-time I/O requests. Meaning write (and read) performance can and will be lower than what it should be if the P510 had had four NAND ICs and four CuA logic pathways to load balance real-time IO with “Smort” Flush requests.
This was the Achille’s heel of the T500 and why we are making such a big deal out of, and mentioning it twice, the low-level improvements the new G9 NAND brings to the table… as the bottlenecks are now basically half the size, and half as impactful as they were just a single generation ago. Still annoying, but a lot more tolerable.
Overall, the P510 is an interesting and certainly unique combination of P-class and T-class design philosophies all melded into one. So much so that you can almost see the compromises the P510 team had to hash out to keep both P and T acolytes happy. As such this… hybrid approach certainly has merit as it offers many of the strengths of the T-class (high performance chief amongst them) with many of the P-class (more focus on overall value and ease of use rather than just performance). No matter if you agree with this assessment or not one thing everyone can agree upon is clear: this is a strange way to show off cutting-edge NAND. We sincerely wish they had opted for a RAM cache controller-based option at the very least.
